Automatic co-verification of FPGA designs in simulink

Georg Brandmayr, Gerhard Humer, Markus Rupp

Publikation: Beitrag in Buch oder TagungsbandVortrag mit Beitrag in TagungsbandBegutachtung


Verification of DSP systems is an error-prone and timeconsuming process, because many manual steps are required to create a prototype. Rapid prototyping is an emerging key design methodology, which allows designers of DSP systems to quickly verify their algorithms by co-simulation. Our rapid prototyping system automates the creation of hardware prototypes defined by just a single input source in GenericC. To verify the feasibility of the design in hardware, prototypes are generated for a Xilinx Virtex-II FPGA, which is part of the RTS-DSP board from ARC Seibersdorf research. Matlab Simulink serves as platform for simulation and hardware cosimulation and thus accesses the prototype. An SRRC filter in co-simulation successfully demonstrates the potential of the rapid prototyping system. The time required for creation of a prototype is reduced by at least one order of magnitude compared to manually coded prototypes. Although area and speed rates of a prototype are typically worse than compared to hand-coded prototypes we show that it is possible to build a one-button rapid prototyping system.
TitelModel-Based Design Conference
PublikationsstatusVeröffentlicht - 2005
VeranstaltungModel-Based Design Conference -
Dauer: 1 Jan. 2005 → …


KonferenzModel-Based Design Conference
Zeitraum1/01/05 → …

Research Field

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